Education

Ph.D.: 2003

The University of Michigan, Ann Arbor

Department of Electrical Engineering and Computer Science

Thesis Title: Closed-Loop Electromechanical Sigma-Delta Microgravity Accelerometers

Advisor: Prof. Dr. Khalil Najafi

Abstract: The objective of this thesis is to investigate the limitations of microaccelerometer systems and develop a micro-g resolution accelerometer system with its interface electronics for inertial navigation applications. The focus of this research is on the interface electronics and the system design.

The interface electronics forms a 2nd order S-D modulator together with the sensor and operates it in an oversampled electromechanical S-D loop to read the sensor capacitance variation, force-rebalance the proof mass, and obtain a direct digital output. This chip operates from a 1MHz clock and provides an adjustable sensitivity between 0.2 and 1.2V/pF with a resolution better than 20aF and a dynamic range up to 140dB. It has been shown that this new circuit can resolve 1micro-g/root-Hz in open-loop when it is combined with high-sensitivity out of plane (z-axis) accelerometers. By using this chip a complete 3-axis ug-resolution accelerometer system has been realized.

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M.Sc.: 1998

Middle East Technical University, Ankara, Turkey

Department of Electrical and Electronics Engineering

Thesis Title: A CMOS Integrated Pt.Si Schottky-Barrier Infrared Detector for Night Vision Applications

Advisor: Prof. Dr. Tayfun Akın

Abstract: Infrared detectors are considered as one of the most strategic defense technologies and are used in a number of military and civilian applications, including night vision, target tracking, missiles, industrial process control, and drivers’ night vision enhancement systems. This thesis demonstrates development of a 640×480 PtSi Schottky-Barrier Diode infrared focal plane array (FPA) that is sensitive to 3-5um wavelengths at liquid nitrogen temperature (77K).

The first achievement in this work is gaining experience on infrared detectors in general and PtSi detectors in particular by the design of a test chip using 1.2um CMOS merged PtSi detector technology developed at IMEC. The second achievement is the design of a 640×480 detector array with on-chip readout circuitry. Detectors pixels measure 25umx25um with 40% fill factor. The imager occupies 17mmx13mm area and works at 30 frames/sec. The third achievement is the development of a new hybrid readout circuit, Current Mirroring Integration (CMI) which offers large dynamic range, high charge storage capacity, almost-unity injection efficiency, and perfect detector bias in a small pixel area of 20umx25um in AMI 0.8um CMOS process. This circuit provides maximum charge storage capacity of 5.25e7 electrons and maximum transimpedance of 6e7mho with 2pF integration capacitance and 5V supply.

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B.Sc.: 1996

Middle East Technical University, Ankara, Turkey

Department of Electrical and Electronics Engineering

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